
#ifndef _DRV_ASW_API_H_
#define _DRV_ASW_API_H_
#ifdef __cplusplus
extern "C" {
#endif

#include "sal.h"
#include "asw/include/drv_enum.h"
#include "asw/include/drv_tbl.h"
#include "asw/include/drv_field.h"
#include "asw/include/drv_tbl_macro.h"

#define DRV_ASW_SDK_VERSION_STR "V1.0"
#define DRV_ASW_SDK_RELEASE_DATE "2022-07-08"
#define DRV_ASW_SDK_COPYRIGHT_TIME "2022"

#define DRV_IOC_READ                0U
#define DRV_IOC_WRITE               1U
#define DRV_IOC_DELETE              2U
#define DRV_IOC_HASH_ADD            3U
#define DRV_IOC_HASH_REMOVE         4U
#define DRV_IOC_HASH_LOOKUP         5U
#define DRV_IOC_HASH_DUMP           6U
#define DRV_MAX_CHIP_NUM  1


#define DRV_IOCTL              drv_asw_tbl_ioctl
#define DRV_FIELD_IOCTL   drv_asw_tbl_field_ioctl
#define DRV_MASK_IOCTL   drv_asw_mask_tbl_ioctl
#define DRV_ENTRY_FLAG    0xFFF
/*CMD: op-memid-fieldid: [31:29][28:13][12:0]*/
#define DRV_IOR(memid, fieldid)    ((DRV_IOC_READ) << 29 |  (memid) << 13 |  (fieldid))
#define DRV_IOW(memid, fieldid)   ((DRV_IOC_WRITE) << 29 |  (memid) << 13 |  (fieldid))
#define DRV_IOD(memid, fieldid)   ((DRV_IOC_DELETE) << 29 |  (memid) << 13 |  (fieldid))
#define DRV_IOHA(memid, fieldid)    ((DRV_IOC_HASH_ADD) << 29 |  (memid) << 13 |  (fieldid))
#define DRV_IOHR(memid, fieldid)   ((DRV_IOC_HASH_REMOVE) << 29 |  (memid) << 13 |  (fieldid))
#define DRV_IOHL(memid, fieldid)   ((DRV_IOC_HASH_LOOKUP) << 29 | (memid) << 13 | (fieldid))
#define DRV_IOHD(memid, fieldid)   ((DRV_IOC_HASH_DUMP) << 29 | (memid) << 13 | (fieldid))

#define DRV_SET_FIELD_A(lchip, t,f,d,v)    drv_asw_set_field(lchip, t,f,(uint32*)d,(uint32*)v)
#define DRV_GET_FIELD_V(lchip, t,f,d)       drv_asw_get_field32(lchip, t,f,(uint32*)d)
#define DRV_SET_FIELD_V(lchip, t,f,d,v)    drv_asw_set_field32(lchip, t, f,(uint32*)d, v)
#define DRV_GET_FIELD_A(lchip, t,f,d,v)    drv_asw_get_field(lchip, t,f,(uint32*)d,(uint32*)v)

#define DRV_SET_FLD(X, T, f, ...)        DRV_SET_FIELD_ ## X(lchip, T ##_t, T ## _ ## f,  ##__VA_ARGS__)
#define DRV_GET_FLD(X, T, f, ...)        DRV_GET_FIELD_ ## X(lchip, T ##_t, T ## _ ## f,  ##__VA_ARGS__)

typedef uint32 ds_t[32];
#ifdef MEM_MODEL
typedef unsigned long long addrs_t;
#else
typedef unsigned long addrs_t;
#endif

enum drv_err_e
{
    DRV_E_NONE = 0,
    DRV_E_INVALID_PTR= -10000,
    DRV_E_TIME_OUT,
    DRV_E_EXIST,
    DRV_E_NOT_EXIST,
    DRV_E_EXCEED_MAX,
    DRV_E_INVALID_TBL,
    DRV_E_INVALID_FLD,
    DRV_E_NOT_READY,               /**< Not ready to configuration */
    DRV_E_INVALID_CHIP,
    DRV_E_HASH_CONFLICT,
    DRV_E_NOT_INIT
};
typedef enum drv_err_e drv_e_t;

typedef struct {
        uint32 start:16;
        uint32 bits:16;
}segs_t;

#ifndef CTC_CLI_EN
typedef struct {
        uint32 field_id:16;
        uint32 bits:16;
        segs_t seg;
}fields_t;
typedef struct tables_info_s {
    uint32 entry_num:16;
    uint32 entry_size:13;
    uint32 op_type:3;   /*0,sram;1-hash;2;sram-mask*/

    uint32 addr_num: 4;
    uint32 field_num:7;
    uint32 blk_id:5;
    uint32 tbl_type:3;
    uint32 entry_offset:13;
    const addrs_t *addrs;
    const fields_t *ptr_fields;
}tables_info_t;
#else
typedef struct {
        char *ptr_fld_name;
        uint32 field_id:16;
        uint32 bits:16;
        segs_t seg;
}fields_t;
typedef struct tables_info_s {
    char *ptr_tbl_name;
    uint32 entry_num:16;
    uint32 entry_size:13;
    uint32 op_type:3;   /*0,sram;1-hash;2;sram-mask*/

    uint32 addr_num: 4;
    uint32 field_num:7;
    uint32 blk_id:5;
    uint32 tbl_type:3;
    uint32 entry_offset:13;
    const addrs_t *addrs;
    const fields_t *ptr_fields;
}tables_info_t;
#endif
/* data with mask storage structure */
struct tbl_entry_s
{
    uint32* data_entry;
};
typedef struct tbl_entry_s tbl_entry_t;


struct hdump_entry_s
{
    uint16 entry_num;         /**<  [in] */
    uint16 valid_num;         /**<  [out]  return index of the next query*/
    uint32 start_index;        /**< If it is the first query, it is equal to 0, else it is equal to the last next_query_index*/
    uint32 next_index;        /**<  [out] return index of the next query*/

    uint32* data_entry;
};
typedef struct hdump_entry_s hdump_entry_t;


/* data with mask storage structure */
struct mask_tbl_entry_s
{
    uint32* data_entry;
    uint32* mask_entry;
};
typedef struct mask_tbl_entry_s mask_tbl_entry_t;


extern const tables_info_t drv_tbls_list[];
#define TABLE_INFO(lchip, tbl_id)                 (drv_tbls_list[tbl_id])
#define TABLE_FIELD_NUM(lchip, tbl_id)            (drv_tbls_list[tbl_id].field_num)
#define TABLE_FIELD_INFO_PTR(lchip, tbl_id)       (drv_tbls_list[tbl_id].ptr_fields)
#define TABLE_MAX_INDEX(lchip, tbl_id)            (TABLE_INFO(lchip, tbl_id).entry_num)
#define SHIFT_LEFT_MINUS_ONE(bits)    ( ((bits) < 32) ? ((1 << (bits)) - 1) : -1)
#define TABLE_ADDR_NUM(lchip, tbl_id)             (TABLE_INFO(lchip, tbl_id).addr_num)

extern int32
drv_asw_init(uint8 lchip);

extern int32
drv_asw_deinit(uint8 lchip);

extern int32
drv_asw_tbl_ioctl(uint8 lchip, int32 index, uint32 cmd, void* val);//sram & hash
extern int32
drv_asw_tbl_field_ioctl(uint8 lchip, int32 index, uint32 cmd, void* val);

extern int32
drv_asw_mask_tbl_ioctl(uint8 lchip, int32 index, uint32 cmd, void* val);

extern int32
drv_asw_get_field(uint8 lchip, uint32 tbl_id, uint32 field_id, uint32* ds, uint32* value);

extern int32
drv_asw_set_field(uint8 lchip, uint32 tbl_id, uint32 field_id, uint32* ds, uint32 *value);

extern int32
drv_asw_set_field32(uint8 lchip, uint32 tbl_id, uint32 field_id, uint32* entry, uint32 value);

extern uint32
drv_asw_get_field32(uint8 lchip, uint32 tbl_id, uint32 field_id, uint32* entry);

extern void
drv_asw_set_io_wr_dis(uint8 lchip, uint32 value);

extern void 
drv_asw_get_io_wr_dis(uint8 lchip, uint32* p_value);

#ifdef __cplusplus
}
#endif

#endif /*end of _DRV_IO_H*/

